Recently, various researches aimed at materializing transistors or memory devices using ferroelectrics have continued to progress. FIG. 1 is a sectional view depicting a typical structure of a metal-ferroelectric-semiconductor (MFS) type memory device using a ferroelectric.
In FIG. 1, a source region 2 and a drain region 3 are formed in specific regions on a silicon substrate 1, and a ferroelectric thin film or a ferroelectric layer 5 is provided on a channel region 4 between the source and drain regions 2 and 3. Here, the ferroelectric layer 5 is formed with inorganic materials having ferroelectric properties such as PZT(PbZrxTi1-xO3), SBT(SrBi2Ta2O9), BLT((Bi,La)4Ti3O12), etc. A source electrode 6, a drain electrode 7, a gate electrode 8, made of metal materials, are arranged on the top of the source region 2, the drain region 3 and the ferroelectric layer 5, respectively.
In the ferroelectric memory device having the above-described structure, the ferroelectric layer 5 shows polarization characteristics according to voltages applied through the gate electrode 8, a conductive channel is formed between the source region 2 and the drain region 3 due to the polarization characteristics and, accordingly, an electric current flows between the source electrode 6 and drain electrode 7. Particularly, in the above-described structure, the polarization characteristics are maintained uniformly even if the voltage applied through the gate electrode 8 is cut off. Accordingly, the above-described structure has attracted attention as a structure that can form a non-volatile memory device with only a transistor, not applying a separate capacitor.
However, the ferroelectric memory device having the above-described structure has some drawbacks as follows. That is, if the ferroelectric layer 5 is formed directly on the silicon substrate 1, a transition layer of low quality is formed on the boundary surface between the ferroelectric layer 5 and the silicon substrate 1 during the formation of the ferroelectric layer 5, and elements such as Pb and Bi in the ferroelectric layer 5 are diffused in the silicon substrate 1, which makes it difficult to form a ferroelectric layer 5 of high quality. Accordingly, it causes a problem in that the polarization characteristics of the ferroelectric layer 5, that is, the data preservation period is much shortened.
Accordingly, taking the above-described drawbacks into consideration, a metal-ferroelectric-insulator-semiconductor structure (MFIS), as it is called, has been proposed for forming a buffer layer 20 made mainly of an oxidized substance between the silicon substrate 1 and the ferroelectric layer 5, as illustrated in FIG. 2.
However, such MFIS type ferroelectric memory device requires an additional manufacturing process for forming the buffer layer 20 and also the data preservation effect is not good. That is, the data preservation period does not exceed 30 days even in case of an excellent product fabricated in a laboratory at present.